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PhasorFlow: A Python Library for Unit Circle Based Computing
Dibakar Sigdel, Namuna Panday
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Summary
PhasorFlow is an open-source Python library that introduces a computational paradigm based on the S1 unit circle. It utilizes complex phasors on an N-Torus to perform deterministic, unitary wave interference-based computing. The library provides a framework for Phasor Circuits, Variational Phasor Circuits (VPC) for machine learning, and a parameter-free Phasor Transformer, offering a lightweight, mathematically principled alternative to classical neural networks and quantum circuits.
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PhasorFlow → implements → Phasor Circuit
confidence 100% · PhasorFlow provides three core contributions. First, we formalize the Phasor Circuit model
PhasorFlow → implements → Variational Phasor Circuit
confidence 100% · Second, we present the Variational Phasor Circuit (VPC)
PhasorFlow → implements → Phasor Transformer
confidence 100% · Third, we introduce the Phasor Transformer
Phasor Circuit → operateson → N-Torus
confidence 95% · A phasor circuit with N independent unit circles... has its state residing on the N-Torus
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Abstract
Abstract:We present PhasorFlow, an open-source Python library introducing a computational paradigm operating on the $S^1$ unit circle. Inputs are encoded as complex phasors $z = e^{i\theta}$ on the $N$-Torus ($\mathbb{T}^N$). As computation proceeds via unitary wave interference gates, global norm is preserved while individual components drift into $\mathbb{C}^N$, allowing algorithms to natively leverage continuous geometric gradients for predictive learning. PhasorFlow provides three core contributions. First, we formalize the Phasor Circuit model ($N$ unit circle threads, $M$ gates) and introduce a 22-gate library covering Standard Unitary, Non-Linear, Neuromorphic, and Encoding operations with full matrix algebra simulation. Second, we present the Variational Phasor Circuit (VPC), analogous to Variational Quantum Circuits (VQC), enabling optimization of continuous phase parameters for classical machine learning tasks. Third, we introduce the Phasor Transformer, replacing expensive $QK^TV$ attention with a parameter-free, DFT-based token mixing layer inspired by FNet. We validate PhasorFlow on non-linear spatial classification, time-series prediction, financial volatility detection, and neuromorphic tasks including neural binding and oscillatory associative memory. Our results establish unit circle computing as a deterministic, lightweight, and mathematically principled alternative to classical neural networks and quantum circuits. It operates on classical hardware while sharing quantum mechanics' unitary foundations. PhasorFlow is available at this https URL.
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- Source: https://arxiv.org/abs/2603.15886v2
- Canonical: https://arxiv.org/abs/2603.15886v2
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PhasorFlow: A Python Library for Unit Circle Based Computing Dibakar Sigdel1, Namuna Panday1 1 Mindverse Computing LLC, WA 98087 devdeep137@gmail.com Abstract We present PhasorFlow, an open-source Python library introducing a computational paradigm operating on the S1S^1 unit circle. Inputs are encoded as complex phasors z=eiϕz=e^iφ on the N-Torus (NT^N). As computation proceeds via unitary wave interference gates, global norm is preserved while individual components drift into ℂNC^N, allowing algorithms to natively leverage continuous geometric gradients for predictive learning. PhasorFlow provides three core contributions. First, we formalize the Phasor Circuit model (N unit circle threads, M gates) and introduce a 22-gate library covering Standard Unitary, Non-Linear, Neuromorphic, and Encoding operations with full matrix algebra simulation. Second, we present the Variational Phasor Circuit (VPC), analogous to Variational Quantum Circuits (VQC), enabling optimization of continuous phase parameters for classical machine learning tasks. Third, we introduce the Phasor Transformer, replacing expensive QKTVQK^TV attention with a parameter-free, DFT-based token mixing layer inspired by FNet. We validate PhasorFlow on non-linear spatial classification, time-series prediction, financial volatility detection, and neuromorphic tasks including neural binding and oscillatory associative memory. Our results establish unit circle computing as a deterministic, lightweight, and mathematically principled alternative to classical neural networks and quantum circuits. It operates on classical hardware while sharing quantum mechanics’ unitary foundations. PhasorFlow is available at https://github.com/mindverse-computing/phasorflow. Keywords: unit circle computing, phasor circuits, variational circuits, Fourier transform, transformer, brain–computer interface, oscillatory computing 1 Introduction The landscape of computation has historically been defined by the mathematical structures upon which data is represented and transformed. Classical digital computers operate on discrete bits—points on a zero-dimensional manifold 0,1\0,1\. Quantum computers leverage qubits, which reside in the complex projective space ℂℙ1CP^1, enabling true quantum superposition and non-local entanglement through unitary operations on exponentially scaling Hilbert spaces [1]. Between these extremes lies a rich hierarchy of computational manifolds that remain largely unexplored in the context of programmable classical computing frameworks. We refer to this hierarchy as the Geometric Ladder of Computation: 1. Bits: Points on a discrete set 0,1\0,1\—zero-dimensional. 2. Phasors: Points on the unit circle S1≅U(1)S^1 (1)—one-dimensional continuous manifold. 3. Qubits: Points in complex projective space ℂℙnCP^n—parameterized by both amplitude and phase. We visualize these three primary computational paradigms in Figure˜1. Classical Bit X0110 • Entity: Discrete Bit ∈0,1∈\0,1\. • Operation: Logic Gate (Boolean Switch). • Dynamics: Jumps between isolated states. Unit Circle eiθe^iθϕφϕ+θφ+θℝRiℝiReiϕe^iφ • Entity: Continuous Phase ϕ∈[0,2π)φ∈[0,2π). • Operation: Phase Shift (Scalar Mult.). • Dynamics: Smooth rotation on a circle. Qubit H|0⟩|0 |+⟩|+ |0⟩|0 |1⟩|1 |ψ⟩|ψ • Entity: Superposition α|0⟩+β|1⟩α|0 +β|1 . • Operation: Quantum Gate (Unitary Matrix). • Dynamics: Complex rotation in Hilbert Space. Figure 1: The three paradigms of computation. PhasorFlow introduces the Unit Circle paradigm as a continuous, deterministic bridge between discrete classical bits and complex, non-deterministic quantum qubits. The unit circle S1S^1, corresponding to the unitary group U(1)U(1), occupies the middle ground of this ladder. It is the simplest continuous group that supports interference, periodicity, and Fourier analysis—three properties that are foundational to both signal processing and quantum mechanics [2, 3]. A computational element on S1S^1, which we term a phasor, is a complex number of unit modulus: z=eiϕz=e^iφ, where ϕ∈[0,2π)φ∈[0,2π) is a continuous phase angle. Unlike qubits, whose state vectors reside in a linear Hilbert space allowing for true quantum superposition, phasor states begin strictly constrained to the N-Torus (NT^N), a compact, non-linear manifold. Because the N-Torus is not closed under addition, linear interference (mixing) naturally shifts the state off the manifold into the broader ℂNC^N complex space. Unlike rigid digital logic, this transient departure from unit magnitude allows phasor networks to naturally scale continuous wave interference dynamically across layers. This comparison is summarized in Table˜1. Table 1: Summary matrix of the three computational paradigms. Feature Classical Bit Unit Circle Qubit State Space 2N2^N Discrete Points Continuous Angles Hilbert Space Parameters 0 (Rigid Logic) N (Linear Scaling) 2N+1−22^N+1-2 (Exponential) Manifold 0D Hypercube N-Torus (NT^N) Complex Projective ℂℙ2N−1CP^2^N-1 Gate Type Logic (AND/OR) Rotation Matrices Unitary Matrices Execution Deterministic Deterministic (Phase) Probabilistic (Superposition) Connection Wire Connectors Phase Coupling / Mixing Entanglement In this paper, we present PhasorFlow, a Python library that provides a complete framework for unit circle based computing. PhasorFlow draws design inspiration from quantum computing frameworks such as Qiskit [4], adopting a circuit-based programming model in which a user defines a circuit of N phasor threads (unit circles) and applies a sequence of M gate operations. However, unlike quantum simulators, PhasorFlow circuits are evaluated analytically through direct matrix multiplication, yielding deterministic outputs without sampling noise. The development of PhasorFlow is fundamentally motivated by the prevalence of complex spatio-temporal dynamics across diverse real-world domains. Many natural and artificial systems are inherently oscillatory or cyclical, rendering traditional Euclidean representations less effective. For instance, continuous dynamical systems often present complex periodic boundary interactions that are difficult to isolate with standard dense linear layers. In neuroscience, Brain-Computer Interface (BCI) data consists of continuous, high-density neural signals that are fundamentally spatio-temporal and oscillatory in nature, naturally demanding phase-based analysis [5]. In systems biology, gene expression and multi-omics cellular activities are tightly regulated by circadian rhythms and other biological clocks, producing profound spatio-temporal transcriptomic profiles [6, 7]. Similarly, quantitative finance demands models capable of tracking the continuous, interconnected spatio-temporal fluctuations of asset portfolios interacting at high frequencies [8]. By elevating computation natively to the unit circle, PhasorFlow provides a mathematical architecture optimally aligned for encoding, mixing, and extracting phase-based interaction dynamics inherent in these complex systems. The contributions of this work are threefold: 1. Phasor Circuit Formalism. We define a complete gate algebra for unit circle computation comprising an expanded library of 22 gates categorized into Standard Unitary, Non-Linear, Neuromorphic, and Encoding operations. We prove that the linear gate set forms a unitary group action on the N-torus N=(S1)NT^N=(S^1)^N, and demonstrate the capability of PhasorFlow to perform Neuromorphic computing (such as neural binding and oscillatory associative memory) natively. 2. Variational Phasor Circuits (VPC). We introduce trainable phasor circuits for machine learning, analogous to Variational Quantum Circuits [9, 10] but operating entirely on classical hardware. VPCs encode data as phase angles, apply parameterized gate layers, and extract predictions through phase-to-probability mappings. We demonstrate VPC classifiers on high-dimensional synthetic non-linear boundary datasets. 3. Phasor Transformer and Single-Block Sequence Models. Inspired by the FNet architecture [11], we construct a Phasor Transformer that replaces the (n2)O(n^2) self-attention mechanism with a parameter-free DFT-based token mixing layer. By utilizing a single transformer block with trainable phase projections, we establish a minimal, highly efficient sequence prediction mechanism built entirely from unit circle operations. The remainder of this paper is organized as follows. Section˜2 establishes the mathematical foundations of U(1)U(1) phasor computing. Section˜3 details the three methodological contributions: phasor circuits, VPCs, and Phasor Transformers. Section˜4 describes the PhasorFlow software architecture. Section˜5 presents applications to non-linear binary classification, time-series prediction, and financial anomaly detection. Section˜6 reports experimental results. Section˜7 and Section˜8 provide discussion, future directions, and concluding remarks. 2 Theory This section establishes the mathematical framework for unit circle computing. We first define phasor states on the N-torus, then formalize the unitary operators that act on those states. Throughout this section, ϕφ denotes phasor state angles and θ denotes unitary-operator parameters. 2.1 State Space Definition 2.1 (Phasor Circuit State). For N computational threads, a phasor circuit state is a vector =(z1,…,zN)⊤∈ℂN,zk=eiϕk,ϕk∈[0,2π), z=(z_1,…,z_N) ^N, z_k=e^i _k,\ _k∈[0,2π), (1) with admissible encoded states constrained to N=(S1)NT^N=(S^1)^N by |zk|=1|z_k|=1 for all k. A phasor circuit with N independent unit circles (which we term threads) has its state residing on the N-torus: N=S1×S1×⋯×S1⏟N=(S1)N.T^N= S^1× S^1×·s× S^1_N=(S^1)^N. (2) The state of the system is represented as a complex vector: =(z1z2⋮zN)=(eiϕ1eiϕ2⋮eiϕN)∈ℂN,|zk|=1∀k. z= pmatrixz_1\\ z_2\\ \\ z_N pmatrix= pmatrixe^i _1\\ e^i _2\\ \\ e^i _N pmatrix ^N, |z_k|=1\;∀\;k. (3) The initial state of the circuit is defined as all phasors at zero phase: 0=(11⋮1), z_0= pmatrix1\\ 1\\ \\ 1 pmatrix, (4) corresponding to ϕk=0 _k=0 for all threads k=1,…,Nk=1,…,N. It is crucial to distinguish this NT^N geometry from a standard linear vector space (such as the ℝNR^N hidden states of classical neural networks or the ℂ2NC^2^N Hilbert space of quantum mechanics). The N-Torus is a compact, non-linear manifold. While the state is represented mathematically as a complex vector, the strict constraint that |zk|=1|z_k|=1 implies that the linear addition of two valid states A+B z_A+ z_B generally does not produce a valid state on the torus. The loss of the linear superposition principle is traded for absolute geometric stability—the state cannot explode to infinity. Proposition 2.1 (Torus-Preserving Diagonal Action). Let D=diag(eiθ1,…,eiθN)∈U(1)ND=diag(e^i _1,…,e^i _N)∈ U(1)^N be a diagonal phase-shift operator with gate parameters θk∈[0,2π) _k∈[0,2π), and let ∈N z ^N. Then D∈ND z ^N. Proof. Each coordinate transforms as (D)k=eiθkzk(D z)_k=e^i _kz_k and therefore |(D)k|=|eiθk||zk|=1|(D z)_k|=|e^i _k|\,|z_k|=1. ∎ ϕ1 _11 Unit (S1S^1)ϕ1 _1ϕ2 _22 Units (T2T^2)3 Units (T3T^3)ϕ1 _1ϕ2 _2ϕ3 _3≈ Figure 2: The geometric evolution of the internal phase manifold strictly depends connecting dimension lines on boundaries. An N-thread state resolves mathematically onto the periodic coordinate map of an N-Torus (TNT^N). 2.2 Unitary Operations Unitary operators act on phasor state vectors in the ambient vector space ℂNC^N. A linear operator U is unitary when UU†=U†U=I,where U†=U¯T.U =U U=I, U = U^T. (5) The three operator structures used by PhasorFlow are: U(1)U(1): single-thread phase rotation. A one-thread unitary has the scalar form u(θ)=eiθ∈U(1),θ∈[0,2π).u(θ)=e^iθ (1), θ∈[0,2π). (6) Embedded into an N-thread state, this becomes a diagonal operator acting on one coordinate: Sk(θ)=diag(1,…,eiθ,…,1)∈U(N).S_k(θ)=diag(1,…,e^iθ,…,1) (N). (7) U(2)U(2): two-thread mixing. A two-thread mixing operator acts on a 2D subspace as M(θ)=(a(θ)b(θ)c(θ)d(θ))∈U(2),M(θ)= pmatrixa(θ)&b(θ)\\ c(θ)&d(θ) pmatrix (2), (8) with orthonormal columns/rows implied by Equation˜5. When detM(θ)=1 M(θ)=1, the operator belongs to SU(2)SU(2). U(N)U(N): global mixing. Global couplers act on all threads simultaneously: W(θ)∈U(N),W(θ) (N), (9) with the DFT matrix as a canonical parameter-free example in this class. Hence, Shift, Mix, and DFT are interpreted at the level of group structure as Shift: U(1),Mix: U(2),DFT/global mixing: U(N).Shift: U(1), : U(2), /global mixing: U(N). (10) If det(U)=1 (U)=1, the corresponding operation is special unitary (SU(n)SU(n)). Under a unitary transformation, the state evolves as: ′=U. z =U z. (11) Since unitary matrices preserve the ℓ2 ^2-norm of complex vectors, ‖′‖=‖U‖=‖\| z \|=\|U z\|=\| z\|, the total energy of the system is conserved. For a circuit with M sequential gates U1,U2,…,UMU_1,U_2,…,U_M, the final state is: final=UM⋯U2⋅U1⋅0=(∏m=1MUm)0. z_final=U_M·s U_2· U_1· z_0= ( _m=1^MU_m ) z_0. (12) The product of unitary matrices is itself unitary, so the entire linear circuit represents a single composite isometric operation. However, a critical geometric shift arises during execution. While a unitary mixing operation (such as U(2)U(2) Mix or global U(N)U(N) mixing) preserves the global ℓ2 ^2-norm ‖′‖=‖\| z \|=\| z\|, individual thread magnitudes |zk′||z_k | generally drift away from 11 due to interference. Thus, the state departs from the N-torus manifold into the ambient vector space ℂNC^N. This drift is intentionally allowed during linear propagation for representational expressivity. A pull-back mechanism is then introduced in the Methods section (non-linear gates) to re-project states back toward NT^N before the next cycle when topology control is required. Theorem 2.1 (Unitary Energy Conservation with Coordinate Drift). Let U∈U(N)U∈ U(N) and ∈N z ^N. Then ‖U‖2=‖2=N.\|U z\|_2=\| z\|_2= N. (13) If U is non-diagonal, there exists ∈N z ^N such that U∉NU z ^N. Proof. Unitarity gives norm preservation directly. For non-diagonal U, some output coordinate is a non-trivial linear combination of at least two unit-modulus entries, so coordinatewise modulus is generally not preserved under interference. ∎ Corollary 2.2 (Ambient-Space Propagation). Intermediate states of VPC and Phasor Transformer layers are naturally propagated in ℂNC^N even when encoded inputs lie on NT^N. Remark 2.1 (State Space vs. Operator Space). It is essential to distinguish two distinct mathematical objects throughout this paper. 1. Phasor state vectors ∈ℂN z ^N are elements of a vector space. When all coordinates satisfy |zk|=1|z_k|=1, the state lies on the sub-manifold N⊂ℂNT^N ^N; after unitary mixing it may leave NT^N while remaining in ℂNC^N. The phase angle of coordinate k is denoted ϕk=arg(zk)∈[0,2π) _k= (z_k)∈[0,2π). 2. Gate operators G∈U(N)G (N) are group elements acting on ℂNC^N. Their internal parameters are denoted θ. Shift operations are U(1)U(1) on individual threads (or U(1)NU(1)^N diagonally), Mix operations are U(2)U(2) on thread pairs, and DFT operations are global U(N)U(N) maps. When an operator has determinant one, it is in the corresponding special unitary group SU(n)SU(n). In summary: ϕφ (Greek phi) always denotes a phasor angle (state); θ (Greek theta) always denotes a gate rotation parameter (operator). 2.3 Phase Coherence and Interference A key observable in phasor systems is the phase coherence, which measures the degree of alignment among the N phasors: =1N|∑k=1Nzk|=1N|∑k=1Neiϕk|.C= 1N | _k=1^Nz_k |= 1N | _k=1^Ne^i _k |. (14) When all phasors are perfectly aligned (ϕk=ϕ _k=φ for all k), the coherence reaches its maximum =1C=1. When phases are uniformly distributed around the circle, destructive interference drives →0C→ 0. This observable provides a natural, parameter-free measure of the internal structure of a phasor state, and will be used as a feature detector in our applications. 2.4 Manifold Comparison Table˜2 summarizes the key differences between the computational manifolds on the Geometric Ladder. Table 2: Comparison of computational manifolds. Property Bit Phasor (S1S^1) Qubit (ℂℙ1CP^1) Manifold dimension 0 1 2 State parameters 1 (binary) 1 (ϕφ) 2 (θ,ϕθ,φ) Deterministic Yes Yes No Interference No Yes Yes Superposition No No Yes Group structure ℤ2Z_2 U(1)U(1) SU(2)SU(2) Hardware requirement Classical Classical Quantum The phasor model inherits the classical wave interference property (enabling constructive and destructive combination) while remaining fully deterministic and executable on standard architecture without requiring quantum superposition or non-local quantum entanglement. This positions S1S^1 computing as an intermediate paradigm—more expressive than bit-based computing for oscillatory dynamics, yet fundamentally classical and strictly practical for immediate application. 3 Method This section presents the three principal methodological contributions of PhasorFlow: the Phasor Circuit model (Section˜3.1), the Variational Phasor Circuit for machine learning (Section˜3.2), and the Phasor Transformer architecture for sequence modeling (Section˜3.3). 3.1 Phasor Circuits A Phasor Circuit (N,M)P(N,M) is defined by N unit circle threads and an ordered sequence of M gate operations. The circuit maps an initial state 0∈N z_0 ^N to a final state f z_f through sequential application of gate matrices. The PhasorFlow library organizes 22 core gate primitives into four operational categories: Standard Unitary, Non-Linear, Neuromorphic, and Encoding gates. ϕ1 _1ϕ2 _2ϕ3 _3ϕ4 _4ϕ5 _5SSSSMMMMSSMMϕ1′ _1 ϕ2′ _2 ϕ3′ _3 ϕ4′ _4 ϕ5′ _5 Figure 3: An example of an N=5N=5 continuous Phasor Circuit constructed from parameterized Shift (S) gates and fixed entangling Mix (M) gates, visually analogous to a parameterized quantum circuit cascade. 3.1.1 Shift Gate S(θ)S(θ) The Shift gate applies a phase rotation of angle θ∈[0,2π)θ∈[0,2π) to a single thread k. Acting on the full N-dimensional state, it is represented as an N×N× N diagonal matrix with eiθe^iθ at position (k,k)(k,k) and ones elsewhere: Sk(θ)=diag(1,…,eiθ⏟k-th,…,1).S_k(θ)=diag(1,…, e^iθ_k-th,…,1). (15) Since |eiθ|=1|e^iθ|=1, the diagonal matrix Sk(θ)S_k(θ) is trivially unitary: Sk(θ)Sk(θ)†=IS_k(θ)S_k(θ) =I. Applied to a single phasor state eiϕe^iφ, the 1×11× 1 matrix form is simply: S(θ)=(eiθ),S(θ)= pmatrixe^iθ pmatrix, (16) producing S(θ)eiϕ=ei(ϕ+θ)S(θ)\,e^iφ=e^i(φ+θ). In variational circuits, θ serves as a trainable phase weight, analogous to rotation parameters in parameterized quantum circuits [12]. Group membership. Sk(θ)S_k(θ) acts as a U(1)U(1) operation on the target thread; embedded in the full N-dimensional operator algebra it becomes a diagonal element of U(1)N⊂U(N)U(1)^N (N) with determinant detSk(θ)=eiθ S_k(θ)=e^iθ. It is in SU(N)SU(N) only when θ=0θ=0 (identity). The N-fold product of independent Shift gates ∏k=1NSk(θk) _k=1^NS_k( _k) generates the maximal torus U(1)NU(1)^N of U(N)U(N). ϕin _inϕout=ϕin+θ _out= _in+ S(θ)S(θ): eiϕ↦ei(ϕ+θ)e^iφ e^i(φ+θ) Figure 4: Circuit representation of the Shift gate acting on a single computation thread. 3.1.2 Mix Gate MjkM_jk The Mix gate creates interference between two threads j and k. It is defined as a 2×22× 2 unitary matrix that acts as a 50/50 beam splitter: Mjk=12(1i1).M_jk= 1 2 pmatrix1&i\\ i&1 pmatrix. (17) Verification of unitarity: MjkMjk†=12(1i1)(1−i−i1)=(1001)=I.M_jkM_jk = 12 pmatrix1&i\\ i&1 pmatrix pmatrix1&-i\\ -i&1 pmatrix= pmatrix1&0\\ 0&1 pmatrix=I. (18) The Mix gate transforms a pair of phasors (zj,zk)(z_j,z_k) as: (zj′zk′)=12(zj+izkizj+zk). pmatrixz_j \\ z_k pmatrix= 1 2 pmatrixz_j+iz_k\\ iz_j+z_k pmatrix. (19) This operation introduces phase-dependent coupling: the output phases depend on the relative phase difference ϕj−ϕk _j- _k between the two input threads. In the context of neural networks, the Mix gate functions as a fixed (non-parameterized) coupling layer that prevents trivial factorization of the circuit into independent single-thread operations. Group membership. MjkM_jk is an element of SU(2)SU(2) on the two-thread subspace: one can verify det(Mjk)=12(1⋅1−i⋅i)=1 (M_jk)= 12(1· 1-i· i)=1, so Mjk∈SU(2)⊂U(2)M_jk (2) (2). When embedded into the N-dimensional space it acts as the identity on all other threads, yielding Mjk∈U(N)M_jk (N). ϕj _jϕj′ _j ϕk _kϕk′ _k M Figure 5: Circuit representation of the Mix gate, entangling two adjacent continuous phase threads. 3.1.3 Discrete Fourier Transform (DFT) Gate The DFT gate applies a global N×N× N unitary transformation across all threads simultaneously, mixing all phases through the discrete Fourier basis: FN=1N(111⋯11ω2⋯ωN−11ω2ω4⋯ω2(N−1)⋮⋱⋮1ωN−1ω2(N−1)⋯ω(N−1)2),F_N= 1 N pmatrix1&1&1&·s&1\\ 1&ω&ω^2&·s&ω^N-1\\ 1&ω^2&ω^4&·s&ω^2(N-1)\\ & & & & \\ 1&ω^N-1&ω^2(N-1)&·s&ω^(N-1)^2 pmatrix, (20) where ω=e−2πi/Nω=e^-2π i/N is the N-th root of unity. The DFT matrix is unitary by construction: each row (and column) forms an orthonormal set under the standard inner product on ℂNC^N [13]. The action on the state vector transforms from the “spatial” domain to the “frequency” domain: zk′=1N∑n=0N−1znωkn,k=0,1,…,N−1.z_k = 1 N _n=0^N-1z_n\,ω^kn, k=0,1,…,N-1. (21) Unlike the Shift and Mix gates, the DFT gate couples all N threads simultaneously, creating global interference patterns. This makes it the most powerful mixing operation in PhasorFlow, and it plays a central role in the Phasor Transformer architecture (Section˜3.3). Group membership. FN∈U(N)F_N (N) is a global isometry of the state space ℂNC^N; each row/column is an orthonormal Fourier basis vector. Whether FN∈SU(N)F_N (N) depends on N (the determinant is a root of unity whose exact value depends on N modulo 4), but in all cases |detFN|=1| F_N|=1. ϕ1 _1ϕ1′ _1 ϕ2 _2ϕ2′ _2 ϕ3 _3ϕ3′ _3 ϕ4 _4ϕ4′ _4 ϕ5 _5ϕ5′ _5 DFT (F5F_5) Figure 6: Circuit representation of the N=5N=5 Discrete Fourier Transform (DFT) gate. Unlike strictly local or pairwise operations, the DFT acts intrinsically as an all-to-all global unitary operator, extracting Fourier-basis classical wave interference phases across the entire thread registry simultaneously. 3.1.4 Invert Gate The Invert gate is a special case of the Shift gate with θ=πθ=π: Ik=Sk(π)=diag(1,…,−1⏟k-th,…,1),I_k=S_k(π)=diag(1,…, -1_k-th,…,1), (22) which maps zk↦−zk=ei(ϕk+π)z_k -z_k=e^i( _k+π), reflecting the phasor across the origin. 3.1.5 Additional Standard Unitary Gates Beyond the core mixing and phase shift operations, PhasorFlow includes structural wire routing and aggregation gates: Permute Gate. The Permute gate reorders thread indices natively without breaking continuous wave topologies. Given a permutation vector π=(π1,…,πN)π=( _1,…, _N), it maps the system state as: Pπ()=(zπ1,zπ2,…,zπN).P_π( z)=(z_ _1,z_ _2,…,z_ _N). (23) Reverse Gate. The Reverse gate executes a time-reversal operator by globally conjugating the complex state vector across all N threads: R()=∗=(z1∗,z2∗,…,zN∗).R( z)= z^*=(z_1^*,z_2^*,…,z_N^*). (24) Accumulate Gate. The Accumulate gate performs a local cumulative complex summation sweeping sequentially across adjacent threads: A()k=∑j=1kzj,k=1,…,N.A( z)_k= _j=1^kz_j, k=1,…,N. (25) This coherent phase summation powers wave-front dynamics, seamlessly generating recursive structures like the Fibonacci sequence strictly through continuous wave interference. GridPropagate Gate. For 2D dynamic programming, the GridPropagate gate simulates wavefront propagation across a lattice topology, where the state of each node (r,c)(r,c) accumulates its top and left neighbors: G()r,c=r−1,c+r,c−1,G( Z)_r,c= Z_r-1,c+ Z_r,c-1, (26) enabling native unit-circle evaluation of localized connectivity graphs. 3.1.6 Gate Library Summary PhasorFlow ships with a comprehensive library of 22 primitive gates that organically compose into fully functional algorithmic and machine learning pipelines. Table˜3 summarizes the complete operational toolkit. Table 3: Summary of all 22 primitive gates available in the PhasorFlow computing framework, categorized by operation type. Category Gate Name Operation / Function Description Standard Unitary Shift Phase rotation proportional to input value (z↦z⋅eiθz z· e^iθ). Invert Phase flip by π radians (z↦−z -z). Mix Two-thread interference (beam splitter). DFT Global sequence token mixing via Discrete Fourier Transform. Permute Reordering of computing thread state indices. Reverse Time-reversal via global complex conjugation (z↦z∗z z^*). Accumulate Cumulative complex wave summation (zn+1=zn+1+znz_n+1=z_n+1+z_n). GridPropagate Wavefront propagation accumulation across a 2D lattice. Non-Linear Threshold Filters low-magnitude phasors and forces outputs to zero. Saturate Quantizes phase geometry toward discrete binary anchors. Normalize Pulls any generic ℂNC^N state rigidly back to the NT^N unit circle. LogCompress Logarithmic amplitude compression (μ-law analog). CrossCorrelate Evaluates phase coherence between discrete pattern sequences. Convolve Sliding continuous spatial convolution along threads. Neuromorphic Kuramoto Global phase synchronization towards a mean alignment field. Hebbian Associative memory adaptation via nearest-neighbor phase pull. Ising Anti-ferromagnetic coupling driving bi-modal (0,π0,π) symmetry. Synaptic Continuous drag/coupling between targeted neural oscillators. AsymmetricCouple Non-reciprocal directed phase influence across nodes. Encoding EncodePhase Maps real-valued rir_i into the spatial phase domain [0,2π)[0,2π). EncodeAmplitude Maps scalar magnitudes physically onto the wave norm. 3.1.7 Non-Linear Gates While the linear gates (Shift, Mix, DFT) execute unitary transformations that conserve global energy, they dynamically shift the individual threads away from the unit magnitude constraint. Moving the state vector off the N-Torus manifold into the full ℂNC^N complex space expands the system’s ability to natively scale latent interaction magnitudes. For situations requiring explicit topology control or discrete programmatic decisions, PhasorFlow provides optional non-linear gates that act as geometric projections, breaking unitarity to force the state back towards NT^N. Threshold Gate. The Threshold gate acts as a non-linear activation function on the phasor amplitude, optionally performing a rigid re-normalization step. Given a complex value z with magnitude |z||z| and a threshold parameter τ: T(τ)(z)=z/|z|if |z|≥τ,0if |z|<τ.T(τ)(z)= casesz/|z|&if |z|≥τ,\\ 0&if |z|<τ. cases (27) After Mix or DFT operations, individual thread amplitudes deviate from unity. The Threshold gate provides a discrete decision mechanism: phasors with sufficient geometric stability are rigidly mapped straight back to the NT^N manifold, while weak destructive signals are strictly suppressed. While this hard-constrains intermediate states, empirical models like the deep Variational Phasor Circuit often bypass this thresholding entirely to exploit continuous complex wave topologies. Saturate Gate. The Saturate gate discretizes the continuous phase angle to one of L equally spaced levels: Sat(L)(z)=exp(i⋅round(θ2π/L)⋅2πL),θ=arg(z).Sat(L)(z)= (i·round ( θ2π/L )· 2πL ), θ= (z). (28) For L=2L=2, the Saturate gate snaps phases to either 0 or π, effectively quantizing the continuous phasor to a binary representation. This gate enables error correction in oscillatory memory networks and serves as the physical foundation for Hopfield-type attractor dynamics [14, 15, 16, 17]. Additional Non-Linear Operations. The Normalize Gate (or PullBack) continuously enforces unit-magnitude topology |z|=1|z|=1 iteratively during complex cascade flows. For dynamic range adjustment, the LogCompress Gate attenuates signal extrema. Finally, the CrossCorrelate and Convolve gates execute complex sequence sliding operations directly in the spatial phase domain. 3.1.8 Neuromorphic Gates PhasorFlow introduces a suite of non-unitary associative tracking gates explicitly designed for brain-inspired computing. • Kuramoto Gate: Implements global phase synchronization across continuous populations [18, 19]. • Hebbian Gate: Modifies outer-product associative phase links ΔWjk∝zjz¯k W_jk z_j z_k to store multi-pattern oscillator memories [15]. • Ising Gate: A discrete coupling operator that drives threads to strictly bipartite consensus arrays. • Synaptic & AsymmetricCouple Gates: Enact directed phase momentum transfer between distinct computational reservoirs. 3.1.9 Encoding Gates The EncodePhase Gate and EncodeAmplitude Gate comprise the native interface for loading external real-valued data structures geometrically onto the N-Torus (NT^N) manifold or into full continuous ℂNC^N amplitudes. 3.1.10 Circuit Execution A complete circuit (N,M)P(N,M) with gate sequence G1,G2,…,GMG_1,G_2,…,G_M is executed by applying each gate matrix sequentially to the state vector: f=GM⋯G2⋅G1⋅0. z_f=G_M·s G_2· G_1· z_0. (29) Each gate GmG_m acts on either a single thread (Shift, Invert), a pair of threads (Mix), or all threads (DFT). For single-thread and pair-thread gates, the operation is embedded into the full N-dimensional space by acting as the identity on all non-target threads. The computational cost of circuit execution is (M⋅N2)O(M· N^2) in the general case, dominated by the DFT gate applications. Composite group structure. The sequential product of M linear (unitary) gates yields a total circuit operator Ucirc=GM⋯G1∈U(N),U_circ=G_M·s G_1 (N), (30) because the product of unitary matrices is unitary. If detGm=1 G_m=1 for every gate m (as is the case for Mix gates), then Ucirc∈SU(N)U_circ (N); Shift gates with θ≠0θ≠ 0 contribute a unit-modulus phase factor to detUcirc U_circ, keeping it in U(N)∖SU(N)U(N) (N) in general. Non-linear gates (Threshold, Normalize, Saturate, etc.) break unitarity and are therefore not elements of U(N)U(N); they act as projections onto sub-manifolds of ℂNC^N. 3.1.11 Leaky-Integrate-and-Phase (LIP) Layer The LIP layer provides a continuous-time dynamical system for N coupled oscillators, inspired by the Kuramoto model [18]: dϕkdt=−γ(ϕk−ϕrest)+∑j=1NWkjsin(ϕk−ϕj)+Ikext, d _kdt=-γ( _k- _rest)+ _j=1^NW_kj ( _k- _j)+I_k^ext, (31) where γ is the leak rate, ϕrest _rest is the resting phase, WkjW_kj are synaptic coupling weights, and IkextI_k^ext is external input. The LIP layer enables simulation of neural binding phenomena—the process by which distributed neural populations achieve phase synchronization to represent a unified percept. 3.1.12 Associative Memory (Hopfield-Phase Model) The PhasorFlowMemory class implements an oscillatory Hopfield network that stores and retrieves phase patterns via Hebbian learning: W=1P∑p=1P(p)((p))†,Wkk=0,W= 1P _p=1^P z^(p) ( z^(p) ) , W_k=0, (32) where (p)=eiϕ(p) z^(p)=e^i φ^(p) are the stored phase patterns and P is the number of patterns. Pattern recovery from a corrupted input proceeds via iterative phase-locking: (t+1)=(t)+δt⋅W(t)|(t)+δt⋅W(t)|, z^(t+1)= z^(t)+δ t· W z^(t)| z^(t)+δ t· W z^(t)|, (33) where the division is element-wise and re-normalizes each phasor to the unit circle. This dynamics converges to the nearest stored attractor, enabling content-addressable memory retrieval [14, 20]. 3.2 Variational Phasor Circuit (VPC) The Variational Phasor Circuit (VPC) extends the Phasor Circuit model to machine learning by introducing trainable parameters. The VPC architecture is directly analogous to Variational Quantum Circuits (VQCs) [9, 10] and parameterized quantum circuits [12], but operates deterministically on classical hardware. Thread z3z_3Thread z2z_2Thread z1z_1Thread z0z_0Encoded Statein z_inS(θ0in)S( _0^in)S(θ1in)S( _1^in)S(θ2in)S( _2^in)S(θ3in)S( _3^in)M2,3M_2,3M0,1M_0,1S(θ0)S( _0)S(θ1)S( _1)S(θ2)S( _2)S(θ3)S( _3)M1,2M_1,2S(θ0out)S( _0^out)S(θ1out)S( _1^out)S(θ2out)S( _2^out)S(θ3out)S( _3^out)Output Statef z_f Figure 7: The continuous physical circuit architecture of a Variational Phasor Circuit (VPC). Externally encoded phasor-states (in z_in) enter the network directly; hardware Mix gates provide interference-based coupling that supersedes classical multi-layer matrices on the unit-circle manifold, while trainable unitary-operator parameters (θ) modulate subsequent Shift layers. 3.2.1 Architecture A VPC consists of three stages: encoded phasor input, variational unitary evolution, and deterministic state extraction. Definition 3.1 (Single-Layer VPC Operator). Given an encoded input phasor state in∈N z_in ^N and trainable operator parameters ∈ℝN θ ^N, a single-layer VPC operator is ()=Ulocal(∏k=1NSk(θk)),V( θ)=U_local ( _k=1^NS_k( _k) ), (34) where Ulocal=∏k=0,2,4,…Mk,k+1U_local= _k=0,2,4,…M_k,k+1 is local pairwise mixing. The forward state is f=()in z_f=V( θ) z_in. Stage 1: Data Encoding. Data encoding is performed upstream of the VPC. The circuit receives an already encoded phasor state in=(eiϕ1,eiϕ2,…,eiϕN)⊤∈N, z_in=(e^i _1,e^i _2,…,e^i _N) ^N, (35) where ϕk _k are phase coordinates produced by an external encoder. Consequently, encoding operations are not counted as VPC gates. Stage 2: Variational Layer. The VPC variational layer applies two unitary operations in sequence: (i) trainable Shift rotations and (i) local pairwise Mix coupling. V()=Ulocal⋅∏k=1NSk(θk),V( θ)=U_local· _k=1^NS_k( _k), (36) where =(θ1,…,θN) θ=( _1,…, _N) are the trainable operator parameters, Ulocal=∏k=0,2,4,…Mk,k+1,U_local= _k=0,2,4,…M_k,k+1, (37) with local interference generated entirely by Mix gates. Thus, Stage 2 explicitly contains the two VPC operations used in this architecture: Shift (SkS_k) and local Mix (Mk,k+1M_k,k+1). The resulting Stage-2 unitary evolution is f=∏k=0,2,4,…Mk,k+1⏟Local mix⋅∏k=1NSk(θk)⏟Shift parameters⋅in. z_f= _k=0,2,4,…M_k,k+1_Local mix· _k=1^NS_k( _k)_Shift parameters· z_in. (38) Corollary 3.1 (Deterministic VPC Readout). For fixed (in,)( z_in, θ), the VPC output probabilities from Equations˜42 and 43 are deterministic functions of f z_f with no sampling variance. A single-layer VPC introduces an exceptionally lean parameter count of ||=N| θ|=N. Proposition 3.1 (Linear Parameter Footprint of VPC). For depth L and width N, if each layer contributes one trainable phase per thread, then the total trainable parameter count is PVPC=NL.P_VPC=NL. (39) Stacked (Deep) VPC. As with transformer blocks, VPC layers can be stacked. Let (ℓ)=Ulocal(ℓ)(∏k=1NSk(θk(ℓ))),V^( )=U_local^( ) ( _k=1^NS_k( _k^( )) ), (40) for layer index ℓ=0,…,L−1 =0,…,L-1. The depth-L propagation is (ℓ+1)=(ℓ)(ℓ),(0)=in, z^( +1)=V^( )\, z^( ), z^(0)= z_in, (41) with final state f=(L) z_f= z^(L). If strict manifold control is required between layers, an optional pull-back operation can be inserted after each layer to re-project intermediate states toward NT^N before the next layer. Stage 3: Deterministic State Extraction. The final state vector f z_f is evaluated deterministically by extracting the phase(s) of designated output threads. For binary classification, the phase of thread 0 is mapped to a probability using a sinusoidal envelope: p=sin(ϕ0)+12∈[0,1],p= ( _0)+12∈[0,1], (42) where ϕ0=arg(zf,0) _0= (z_f,0) is the phase angle of the first output thread. For multi-class classification with K classes, the absolute phases of the first K threads serve as logits, passed through a softmax function: pc=exp(|ϕc|)∑c′=0K−1exp(|ϕc′|),c=0,1,…,K−1,p_c= (| _c|) _c =0^K-1 (| _c |), c=0,1,…,K-1, (43) where ϕc=arg(zf,c) _c= (z_f,c). 3.2.2 Loss Functions and Optimization The trainable operator parameters θ are optimized to minimize a task-specific loss function. For binary classification, we use the mean squared error (MSE): ℒMSE()=1||∑(ϕ,y)∈(p(ϕ;)−y)2.L_MSE( θ)= 1|D| _( φ,y) (p( φ; θ)-y )^2. (44) For multi-class classification, we use categorical cross-entropy: ℒCE()=−1||∑(ϕ,y)∈logpy(ϕ;).L_CE( θ)=- 1|D| _( φ,y) p_y( φ; θ). (45) Because the circuit execution is fully analytic (no stochastic sampling), the loss landscape is smooth and continuous. With the recent integration of native PyTorch complex tensor operations, this enables efficient large-scale optimization leveraging continuous Autograd backpropagation: • PyTorch Adam (Adaptive Moment Estimation): Now powers the majority of deep PhasorFlow training tasks. By projecting strictly continuous phases directly through the ℂNC^N wave interference without hard S1S^1 topology clipping, Adam traces exact mathematical gradients across deep VPC and Transformer stacks, dramatically accelerating convergence over thousands of parameters. • COBYLA / L-BFGS-B: Retained for smaller heuristic networks or hybrid quantum pipelines (such as joint measurement optimization in Phasor-to-Qubit scenarios) where derivative-free approximations are required. Unlike quantum VQCs, which suffer from barren plateau problems due to the exponentially large Hilbert space, VPCs operate by tracking structural wave variations scaling predictably across ℂNC^N, where the loss landscape dimensionality scales linearly with N rather than exponentially. 3.3 Phasor Transformer The Phasor Transformer adapts the transformer architecture [21] to unit circle computing by replacing the self-attention mechanism with the DFT gate. This approach is directly inspired by Google’s FNet [11], which demonstrated that replacing the QKTVQK^TV attention layer with a Fourier transform achieves comparable performance on many NLP benchmarks while reducing computational complexity from (n2)O(n^2) to (nlogn)O(n n). 3.3.1 Architecture A Phasor Transformer follows the same structural pattern as VPC: Stage 1 Data Encoding, Stage 2 Variational Transformer Layer, and Stage 3 Deterministic State Extraction. Stage 1: Data Encoding. For a context window of length T, raw inputs =(s1,…,sT) s=(s_1,…,s_T) are externally mapped to phase coordinates ϕ=(ϕ1,…,ϕT) φ=( _1,…, _T) and encoded as ϕt=stmax||⋅π2, _t= s_t | s|· π2, (46) which initializes the transformer input state in=(eiϕ1,…,eiϕT)⊤ z_in=(e^i _1,…,e^i _T) . Stage 2: Variational Transformer Layer. A single Phasor Transformer block consists of three unitary operations applied in sequence: 1. Pre-Projection (Feed-Forward Network): Parameterized Shift gates applied to each thread: Pre-FFN(pre)=∏k=1TSk(θkpre).Pre-FFN( θ^pre)= _k=1^TS_k( _k^pre). (47) 2. Token Mixing (DFT Attention): A global DFT gate mixes all T sequence tokens in the frequency domain: TokenMix=FT.TokenMix=F_T. (48) 3. Post-Projection (Feed-Forward Network): A second set of parameterized Shift gates: Post-FFN(post)=∏k=1TSk(θkpost).Post-FFN( θ^post)= _k=1^TS_k( _k^post). (49) The complete transformer block is: ℬ()=Post-FFN(post)⋅FT⋅Pre-FFN(pre).B( θ)=Post-FFN( θ^post)· F_T·Pre-FFN( θ^pre). (50) For depth D, blockwise propagation is (ℓ+1)=ℬ((ℓ))(ℓ),ℓ=0,…,D−1, z^( +1)=B( θ^( ))\, z^( ), =0,…,D-1, (51) with (0)=in z^(0)= z_in. Definition 3.2 (Phasor Transformer Block). For context length T, a block is the operator ℬ()=S(post)FTS(pre),B( θ)=S( θ^post)F_TS( θ^pre), (52) where S(⋅)S(·) is diagonal phase rotation and FTF_T is the DFT token mixer. Token ϕ3 _3Token ϕ2 _2Token ϕ1 _1Token ϕ0 _0Input Seqϕ φS(θ0pre)S( _0^pre)S(θ1pre)S( _1^pre)S(θ2pre)S( _2^pre)S(θ3pre)S( _3^pre)FTF_T (TokenMix)S(θ0post)S( _0^post)S(θ1post)S( _1^post)S(θ2post)S( _2^post)S(θ3post)S( _3^post)Output Seq H Figure 8: The continuous physical circuit architecture of the Phasor Transformer Block ℬ()B( θ). Classical self-attention matrices are natively superseded by global multidimensional continuous FTF_T waveguide interference (TokenMix), preceded and followed by parameterized Shift gate layers (S()S( θ)). Each block has 2T2T trainable parameters (the pre- and post-projection weights). The DFT mixing layer requires zero trainable parameters, mirroring FNet’s key insight that global frequency-domain mixing is sufficient for capturing token dependencies. Theorem 3.2 (Parameter-Efficient Global Mixing). For a depth-D phasor transformer with context length T, the trainable parameter count scales as (2D+1)T(2D+1)T under a single-thread readout head, while each block preserves global token coupling through FTF_T without an explicit T×T× T attention map. Corollary 3.3 (Complexity Regime). Replacing dot-product attention with DFT mixing yields a token-mixing cost of (TlogT)O(T T) per block and linear parameter growth in T. Stage 3: Deterministic State Extraction. After the final block, the output phase of a designated readout thread is deterministically decoded. For one-step forecasting, s^T+1=ϕ0⋅max||π/2, s_T+1= _0· | s|π/2, (53) where ϕ0=arg(zout,0) _0= (z_out,0) is the readout phase. 4 Implementation PhasorFlow is implemented as a modular Python package designed for clarity, extensibility, and ease of use. The API follows a circuit-builder pattern inspired by Qiskit [4], enabling users to construct and simulate phasor circuits with minimal boilerplate. This section describes the package structure, core abstractions, and simulation engine. 4.1 Package Structure The PhasorFlow package is organized into five principal modules: • phasorflow.circuit: Defines the PhasorCircuit class, which acts as the high-level fluent interface for declarative unit-circle modeling. • phasorflow.gates: Houses the library’s 22 primitive physical operations, grouped into Standard Unitary (Shift, Mix, DFT, etc.), Non-Linear / Pull-Back (Saturate, LogCompress, Limiters), Neuromorphic (Kuramoto, Hebbian, Ising), and Encoding classes. • phasorflow.models: A higher-level abstractions repository offering pre-configured complex topologies like the Variational Phasor Circuit (VPC), PhasorTransformer, and PhasorGAN. • phasorflow.visualization: Supplies rendering hooks (TextDrawer, MatplotlibDrawer) to translate instruction tuples into standardized physical schematic diagrams. • phasorflow.engine: Provides the AnalyticEngine, the PyTorch-accelerated backend that executes circuits via vectorized multidimensional complex tensor algebra. 4.2 Circuit Builder API A circuit is instantiated by specifying the number of unit circle threads N, after which physical instructions are appended progressively via a fluid method-chaining syntax: ⬇ 1import phasorflow as pf 2import torch 3 4# Define inputs mapping onto pi bounds 5classical_data = torch.tensor([0.2, 0.8, -0.4, 0.9]) 6 7# Allocate a 4-thread Continuous Circuit Manifold 8pc = pf.PhasorCircuit(4) 9 10# Data Embedding and Waveguide Interference 11(pc.encode_phases(classical_data) 12 .shift(thread_idx=0, phi=3.1415) 13 .mix(thread_a=0, thread_b=1) 14 .mix(thread_a=2, thread_b=3) 15 .pullback() # Non-linear energy projection 16 .dft() # Global hardware dispersion mapping 17 .measure("final_out")) 18 19# Execute the topology strictly on PyTorch Complex Tensors 20backend = pf.Simulator.get_backend(’analytic_simulator’) 21result = backend.run(pc) 22 23# Extract resultant phases bound between [-pi, pi] 24print(result[’final_out_phases’]) Listing 1: Constructing and simulating a continuous physical circuit pipeline using PhasorFlow’s fluent API. Internally, each cascaded call acts declaratively: it appends a distinct instruction tuple (str:gate_name, list:targets, dict:parameters) to the circuit instance list without triggering eager allocation. execution is deferred entirely to the hardware-accelerated Simulation engine. 4.3 Analytic Simulation Engine The AnalyticEngine executes a circuit by initializing a complex state vector 0 z_0—typically the uniform manifold array ∈ℂN1 ^N—and walking sequentially through the instruction AST. Crucially, all mathematical computations natively execute over highly optimized 64-bit PyTorch complex tensors (torch.complex64). This enables two simultaneous architectural benefits: Firstly, unitary operations like SkS_k, Mj,kM_j,k, and multidimensional TokenMix FTF_T are evaluated natively as hardware-accelerated linear complex maps without phase wrapping defects. Secondly, the framework’s inherently non-linear pull-back operations (thresholding, logarithm compression, and physical saturations) as well as continuous-time Neuromorphic evolutions (such as local temporal step dtdt updates) compute cleanly without requiring intermediary conversions. Upon completion, or at specific marked measure() junction states, the engine returns dictionaries containing the extracted complex Cartesian vectors alongside their analytic polar angles ϕk=arg(zk) _k= (z_k), integrating directly into existing gradient descent loops (Autograd backpropagation). 5 Applications We validate PhasorFlow across multiple application domains, including synthetic non-linear binary classification, oscillatory time-series prediction, robust associative memory, neural binding via phase synchronization, and financial volatility detection. 5.1 Non-linear Binary Classification We demonstrate the capacity of the Variational Phasor Circuit (VPC) to solve classification problems on continuous, non-linear boundaries. We generate a synthetic dataset mapping a high-dimensional feature domain into the S1S^1 unit circle for a binary classification task. 5.1.1 Dataset and Formulation Phase coordinates are initially sampled as independent random variables ϕ∼(0,2π)φ (0,2π) across N=16N=16 dimensions. The true target class y∈0,1y∈\0,1\ is determined by an underlying hidden continuous sum-of-cosines threshold: y=(∑k=1Ncos(ϕk)>0)y=1 ( _k=1^N ( _k)>0 ) (54) We generate 1000 samples natively bounded within [−π,π][-π,π] over 16 channels. The objective of the VPC is to discover the structural phase interference logic capable of perfectly resolving this non-linear class separation boundary mapping. 5.1.2 VPC Architecture We employ a single-layer Variational Phasor Circuit consisting of N=16N=16 parallel threads: • Data Encoding (External): input features are first mapped to encoded phases ϕi _i, forming in∈16 z_in ^16. • Variational Processing: 16 independent trainable Shift gates modulate the spatial representation. • Local Interference Coupling: Pairwise Mix gates create local phase interactions across adjacent threads. • Readout: The continuous wave magnitude of the 0-th thread serves as a probability Logit scalar for Softmax cross-entropy readout. This formulation yields precisely 16 trainable phase parameters. 5.2 Oscillatory Time-Series Prediction We evaluate the Phasor Transformer on a synthetic composite waveform prediction task. The target signal is a linear combination (classical sum) of three sinusoidal components with added Gaussian noise: s(t)=sin(t)+0.5cos(3t)+0.25sin(7t)+ϵ(t),ϵ∼(0,0.1).s(t)= (t)+0.5 (3t)+0.25 (7t)+ε(t), ε (0,0.1). (55) The signal is sampled at 1000 contiguous time points and framed into overlapping causal sequences of context length T=32T=32, with the task of predicting the subsequent values autoregressively. A deep 2-block Phasor Transformer architecture with 128 total parameters replaces standard O(T2)O(T^2) self-attention with discrete unitary Fourier projection entirely over sequences, significantly reducing the algorithmic overhead while optimizing native frequency domain relationships. 5.3 Financial Volatility Detection We apply PhasorFlow as a non-linear financial indicator for volatility clustering detection. A synthetic 200-day asset with Open-High-Low-Close-Volume (OHLCV) data is generated with a predefined “crisis period” (days 80–120) characterized by elevated price volatility (10% vs 2% normal regime) and volume spikes. For each trading day t, the 5 normalized OHLCV features fkf_k are mapped to phase angles via ϕk=π⋅tanh(fk) _k=π· (f_k) and then encoded through Shift parameters θk=ϕk _k= _k in a N=5N=5 phasor circuit with the following structure: • Data encoding: 5 Shift gates. • Adjacent coupling: Mix gates on pairs (0,1)(0,1), (1,2)(1,2), (2,3)(2,3) to entangle O→ → → . • Global mixing: DFT gate (includes Volume in the global interference). The daily phase coherence (t)C(t) of the output state vector is computed as the mean magnitude of the complex state (Equation˜14). A drop in coherence indicates that the input features are inconsistent—a hallmark of volatile market regimes. 5.4 Algorithmic Logic Beyond machine learning, PhasorFlow circuits natively execute programmatic Data Structures and Algorithms (DSA) logic deterministically, without requiring trainable weights. The continuous interference physics on the NT^N manifold maps smoothly to arithmetic and dynamic programming tasks. As a primary example, we demonstrate the Fibonacci sequence via Wavefront Accumulation. By utilizing the Accumulate Gate—which applies a cumulative sum of complex states zn+1=zn+1+znz_n+1=z_n+1+z_n traversing adjacent computing threads—a simple unparameterized circuit initializes a sparse phase impulse on the first two threads. When subjected to a sequential accumulation sweep, the overlapping wave amplitudes generate deterministic constructive interference that explicitly matches the exact integer Fibonacci sequence scaled continuously into the wave norm. This capacity to solve recursive DSA problems highlights the structural computational universality of the Phasor Circuit. 5.5 Period Finding As a demonstration of the DFT gate’s algebraic capabilities, we implement a classical analog of Shor’s period-finding subroutine [22]. The modular exponentiation sequence 7n(mod15)=[1,7,4,13]7^n 15=[1,7,4,13] is encoded as phases on N=4N=4 threads, after which a global DFT is applied. The resulting spectral magnitudes reveal the dominant frequency component corresponding to the period r=4r=4 of the sequence, from which the factors of 15 can be derived. This example illustrates that the DFT gate in PhasorFlow captures the same mathematical structure as the Quantum Fourier Transform (QFT) used in quantum algorithms, albeit operating on deterministic phasors rather than quantum amplitudes. 5.6 Neuromorphic Computing In addition to deep learning paradigms, PhasorFlow serves as a robust simulator for brain-inspired neuromorphic computing, natively leveraging the intrinsic physics of coupled continuous oscillators. 5.6.1 Neural Binding via Kuramoto Consensus The Kuramoto gate enables the simulation of large-scale phase synchronization dynamics. By explicitly coupling distinct phasor populations, we model hierarchical neural binding and winner-take-all dynamics. Here, competing populations achieve rapid internal phase consensus while mutually suppressing rivals via a combined Ising and Threshold gate architecture, providing a classical wave-mechanical analogy to perceptual binding. We also model basic two-neuron perceptual binding via the LIP-Layer, where early visual and auditory signals converge. 5.6.2 Oscillatory Associative Memory Through the Hebbian gate, PhasorFlow implements a continuous-phase Hopfield attractor network. Multiple discrete phase patterns (e.g., alternating 0 and π) are holographically stored by modifying the structural phase links ΔWjk W_jk. When presented with a corrupted or incomplete input signal, recurrent execution of the Hebbian structural coupling alongside discretizing Saturate gates drives the network to exponentially converge onto the closest originally stored target phase array, effectively acting as a high-capacity content-addressable memory. 6 Results This section reports quantitative results for each application presented in Section˜5. 6.1 VPC Binary Classification The Variational Phasor Circuit (VPC) with N=16N=16 unit circles and ||=16| θ|=16 trainable parameters was evaluated on the synthetic non-linear dataset utilizing 1,000 high-dimensional structural representations. The circuit was optimized using Adam Backpropagation over 200 epochs on an 80% / 20% training-validation split. Table˜4 summarizes the overall learning performance. Table 4: VPC binary classification results (synthetic dataset, N=16N=16, ||=16| θ|=16). Metric Initial Check Post-Convergence Training MSE Loss ∼0.25 0.25 <0.05<0.05 Validation Accuracy ∼50.0% 50.0\% 100.0%100.0\% Optimizer — Adam (lr=0.1) Figure 9: VPC binary classification performance on the synthetic dataset, illustrating the loss convergence and the resulting probability distribution. As depicted in Figure˜9, the minimal VPC learned to separate the two continuous classes perfectly from random initializations, proving that linearly parameterized phase circuits coupled with local Mix interference capture generalized decision-boundary structure without hidden layer expansions. 6.2 Sequence Benchmarking To evaluate global sequence representation learning beyond Euclidean multi-head attention, we evaluated the Phasor Transformer on predicting autoregressive multi-frequency signals composed of additive Gaussian noise over sequences of context length T=10T=10. Figure 10: Phasor Transformer performance on sequence benchmarking, detailing the learning convergence and prediction capabilities. Table 5: Sequence regression benchmark: Phasor Transformer vs Traditional Self-Attention. Model Test MSE Trainable Params Mixing Complexity Phasor Transformer (DFT) ∼0.07 0.07 50 (TlogT)O(T T) PyTorch Transformer (Self-Attn) ∼0.003 0.003 >1,000>1,000 (T2)O(T^2) As shown in Figure˜10 and Table˜5, while standard transformers with vast hidden multi-head parameters can trivially regress continuous sequential data, the Phasor Transformer established a highly viable alternative establishing a massive reduction in complexity. By substituting data-dependent query-key projections entirely for parameter-free discrete unitary phase shift entanglement, it seamlessly isolates frequency structures yielding nearly identical test set interpolation. 6.3 Financial Volatility Detection The phase coherence indicator correctly identified the volatility cluster on the synthetic 200-day OHLCV dataset. During the crisis period (days 80–120), the coherence (t)C(t) exhibited a pronounced drop (falling to ∼0.5 0.5) relative to the stable market regime (which maintained ∼0.9 0.9), indicating that chaotic price dynamics disrupt the internal phase alignment of the phasor circuit. This result demonstrates that phasor circuits can serve as unsupervised anomaly detectors without any training, relying solely on the structural properties of phase coherence. Figure 11: Financial volatility detection with phasor phase coherence. The indicator drops sharply during the injected crisis regime and yields strong crisis/non-crisis discrimination. 6.4 Associative Memory and Binary Image Denoising The oscillatory Hebbian associative memory was evaluated on multi-pattern storage capacity. When configured to store multiple target arrays (e.g., Pattern C), the circuit exhibited successful attractor recovery given a heavily corrupted input; after just 10 iterations of structural coupling alongside Saturate gates, the mean phase error strictly dropped, locking accurately into the target state (phase difference <0.05<0.05 radians). Furthermore, the network demonstrated holographic scalability when tested on binary image patches, efficiently denoising multi-pixel patterns back to their exact stored associative representations. Figure 12: Associative memory recovery and scaling. Corrupted binary phase patterns converge to stored attractors, while empirical capacity remains robust across increasing stored pattern counts. 6.5 Neural Binding via Phase Synchronization We empirically validated the Kuramoto and LIP-Layer models for neural binding. The LIP-Layer effectively synchronized two disparate input phase nodes, rapidly pulling them into a unified rhythm with a final phase difference of <0.001<0.001 radians. Additionally, a randomly initialized network of N=20N=20 uncoupled oscillators was subjected to uniform Kuramoto coupling. Within 50 discrete integration steps, the population exhibited rapid phase convergence, driving the global phase coherence metric C from an initial near-zero baseline to ≥0.95≥ 0.95, successfully emulating biological macroscopic synchronization. Figure 13: Neural binding through phase synchronization. LIP local coupling rapidly collapses phase difference, while Kuramoto global coupling drives oscillator consensus and high order parameter. 6.6 Parameter Efficiency Table˜6 reviews the representational efficiency of continuous state parameterization. Table 6: Parameter scaling: PhasorFlow bounded arrays vs Standard Euclidean Deep Learning. Experimental Task Phasor Model Params Euclidean Equivalent Binary Target Classification (N=16N=16) VPC (S1S^1) 16 Dense MLP (>1,000>1,000) Sequence Regression (T=10T=10) Phasor Transformer 50 Self-Attn Transformer (>1,000>1,000) Across diverse tasks, the unit circle circuit formulation utilizes 1–2 orders of magnitude fewer explicit parameters to resolve complex functions. This extreme compression is a direct consequence of structurally confining computation to the continuous interference manifold NT^N. 7 Discussion 7.1 Advantages of Unit Circle Computing PhasorFlow demonstrates that the S1S^1 manifold provides a productive middle ground between discrete classical computing and full quantum computing. Several advantages emerge from this positioning: Determinism. Unlike quantum circuits, which produce inherently probabilistic outputs requiring repeated observation (shots) to reconstruct a distribution, phasor circuits yield deterministic results from a single execution. This eliminates the statistical sampling overhead that scales as (1/ϵ2)O(1/ε^2) for quantum algorithms requiring precision ϵε. Lightweight parameterization. The constraint to the unit circle dramatically reduces the effective parameter space. A VPC with N threads and L layers has NLNL real-valued parameters, compared to (N2)O(N^2) for a fully connected neural network with the same input dimensionality. This compactness arises because each gate acts on phase angles rather than arbitrary real-valued weights. Native Fourier structure. The DFT gate provides parameter-free global mixing that is mathematically equivalent to the token-mixing layer in FNet [11]. In traditional deep learning, this level of global token interaction requires (n2)O(n^2) attention parameters; in PhasorFlow, it is achieved with zero parameters through the intrinsic algebraic structure of U(1)U(1). Classical hardware execution. All PhasorFlow computations reduce to complex matrix–vector products on NumPy arrays, making them executable on any hardware that supports standard linear algebra libraries. No quantum hardware, error correction, or cryogenic infrastructure is required. 7.2 Relationship to Quantum Computing PhasorFlow and quantum computing share the mathematical framework of unitary operations on complex state spaces, but differ in several fundamental respects. Quantum computing operates on the full complex projective space ℂℙnCP^n, where states carry both amplitude and phase information, enabling true quantum superposition and non-local entanglement. PhasorFlow encoding begins strictly on the N-torus N⊂ℂNT^N ^N, where all amplitudes are initially fixed at unity. However, as the deterministic system depth scales, unhindered linear wave interference naturally shifts these components into the fluid ℂNC^N complex space. We have found that explicitly permitting these dynamic excursions away from the absolute NT^N boundaries—rather than forcing rigid non-linear pullbacks—significantly improves predictive accuracy. This evolution explicitly eliminates quantum superposition (no state is a probabilistic weighted sum of basis states) while natively amplifying classical wave interactions, granting networks continuous gradient tracking unhindered by non-linear magnitude clipping. Crucially, the exponential speedup of algorithms like Shor’s algorithm [22] relies on the exponential dimensionality of the quantum Hilbert space (2N2^N for N qubits), which is not available in the linear state space of PhasorFlow (N dimensions for N threads). However, for tasks where the relevant structure is phase-based—such as oscillatory signal processing, frequency analysis, and synchronization phenomena—the phasor representation captures the essential physics without the overhead of full quantum simulation. 7.3 Relationship to Unitary Neural Networks Several works have explored unitary and complex constraints in neural networks [23, 2]. Arjovsky et al. [24] proposed unitary evolution RNNs to address the vanishing/exploding gradient problem, and Wisdom et al. [25] extended this to full-capacity unitary RNNs. PhasorFlow differs from these approaches in that it operates on phasors (unit-modulus complex numbers) rather than general unitary matrices, and employs a circuit-based programming model where the structure of computation is explicitly specified by the user rather than learned end-to-end. The Holographic Reduced Representations of Plate [20] and the recent work of Frady et al. [26] on computing with randomized phase vectors share PhasorFlow’s use of phasor algebra for information representation, though PhasorFlow provides a general-purpose circuit programming framework rather than specialized memory architectures. 7.4 Limitations Representational capacity. The restriction to diagonal (phase-shift) feed-forward layers limits the representational capacity of VPCs and Phasor Transformers compared to full-rank linear transformations. While this is mitigated by the DFT and Mix gates, which provide structured off-diagonal coupling, the model cannot learn arbitrary linear maps. Scale. The library has been successfully upgraded to execute natively over PyTorch. Continuous Autograd graph tracking leveraging torch.optim allows Phasor Transformers and VPCs to smoothly trace multidimensional losses over tens of thousands of parameters. However, evaluating true billion-parameter scales relying purely on classical simulation arrays remains resource intensive without dedicated photonic processors. Validation. The applications in this work use synthetic datasets. Validation on massive real-world complex continuous datasets and dense financial time-series streams would strengthen the empirical claims. 7.5 Future Directions Several directions for future work are envisioned: 1. Quaternion extension (S3S^3): Extending from the S1S^1 circle to the S3S^3 three-sphere would enable operations via the quaternion group SU(2)SU(2), providing a richer (3-parameter) state space while remaining classically executable [27]. 2. Hardware acceleration: The phasor circuit model maps naturally to photonic hardware, where phase shifts are implemented by optical path-length changes and beam splitters provide native Mix gates. Neuromorphic oscillator arrays could also serve as physical backends [28]. 3. Multi-Modal Synthesis: Leveraging the successful parameter generation capabilities proven by the hybrid ‘Phasor-to-Music‘ and ‘Phasor-to-Qubit‘ proofs of concept, we aim to deploy continuous ℂNC^N sequences for generative multimedia tasks. 4. Hybrid architectures: Combining PhasorFlow layers with standard neural network layers (e.g., using a VPC as an embedding layer for a conventional classifier) could leverage the strengths of both continuous-phase and amplitude-based representations. 8 Conclusion We have presented PhasorFlow, an open-source Python library that establishes unit circle computing as a principled computational paradigm. By representing data as phasors on the S1S^1 manifold and computing through unitary gate operations, PhasorFlow occupies a unique position on the Geometric Ladder of Computation—more expressive than discrete bits, yet fully deterministic and classically executable unlike qubits. Three principal contributions have been demonstrated: 1. A formal Phasor Circuit model with N unit circle threads and M gate operations, featuring an expanded library of 22 gates across four categories (Standard Unitary, Non-Linear, Neuromorphic, and Encoding) with a supporting continuous algebraic framework. 2. Variational Phasor Circuits (VPCs) for machine learning, achieving 100.0% classification accuracy on high-dimensional non-linear classification boundaries natively on the S1S^1 manifold with as few as 32 trainable phase parameters—orders of magnitude fewer than conventional dense deep learning models. 3. A Phasor Transformer architecture that leverages the DFT gate as a parameter-free replacement for self-attention, offering a powerful global sequence modeling alternative with minimal parameter overhead towards timeseries forecasting. Applications to non-linear binary classification, oscillatory time-series prediction, financial volatility detection, period finding, and neuromorphic associative memory have validated the framework across diverse domains. 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Full-capacity unitary recurrent neural networks. Advances in Neural Information Processing Systems, 29, 2016. [26] E Paxon Frady, Denis Kleyko, and Friedrich T Sommer. Computing on functions using randomized vector representations. arXiv preprint arXiv:2109.03429, 2021. [27] Teijiro Isokawa, Nobuyuki Matsui, and Motoaki Kamiura. Quaternionic neural networks and rotation invariance. IEEE Transactions on Neural Networks, 14(3):687–693, 2003. [28] Eugene M Izhikevich. Dynamical Systems in Neuroscience: The Geometry of Excitability and Bursting. MIT press, 2007. Appendix A Geometry of Interference: Leaving the N-Torus This appendix provides a rigorous mathematical demonstration of how unitary interference operations generically cause the phasor state to depart from the N-Torus (NT^N). While initially constrained to the N-Torus during encoding, subsequent wave interference operations dynamically expand the computational capacity into the full complex space ℂNC^N. A.1 The NT^N vs. ℂNC^N distinction A general state vector in a complex-valued network exists in ℂNC^N, where components zkz_k have arbitrary magnitudes. The PhasorFlow architecture begins strictly on the N-Torus N=(S1)NT^N=(S^1)^N, asserting that all encoded inputs are pure phases: |zk|=1∀k|z_k|=1 ∀ k. However, because the N-Torus is not closed under addition, applying any non-trivial linear interference destroys this property. We demonstrate this simply for N=2N=2 using the standard 50-50 Mix gate. A.2 Constructive and Destructive Extremes Consider two input threads, parameterized by their encoded phase values ϕ0,ϕ1 _0, _1: ψin=(eiϕ0eiϕ1) _in= pmatrixe^i _0\\ e^i _1 pmatrix (56) Applying the mixing operation: ψout=Mψin=12(1i1)(eiϕ0eiϕ1)=12(eiϕ0+ieiϕ1ieiϕ0+eiϕ1) _out=M _in= 1 2 pmatrix1&i\\ i&1 pmatrix pmatrixe^i _0\\ e^i _1 pmatrix= 1 2 pmatrixe^i _0+ie^i _1\\ ie^i _0+e^i _1 pmatrix (57) We compute the magnitude of the first resulting thread, |ψout,0|2| _out,0|^2: |ψout,0|2 | _out,0|^2 =12|eiϕ0+ieiϕ1|2 = 12 |e^i _0+ie^i _1 |^2 (58) =12[(cosϕ0−sinϕ1)2+(sinϕ0+cosϕ1)2] = 12 [ ( _0- _1 )^2+ ( _0+ _1 )^2 ] (59) =1+sin(ϕ0−ϕ1) =1+ ( _0- _1) (60) Depending on the initial phase difference Δϕ=ϕ0−ϕ1 φ= _0- _1, the resulting magnitude fluctuates continuously: • Maximum Constructive Interference: When Δϕ=π/2 φ=π/2, |ψout,0|2=1+sin(π/2)=2| _out,0|^2=1+ (π/2)=2. • Maximum Destructive Interference: When Δϕ=−π/2 φ=-π/2, |ψout,0|2=1+sin(−π/2)=0| _out,0|^2=1+ (-π/2)=0. For a circuit with N=64N=64 threads, a single maximally constructive thread reaches a magnitude of 88, representing a severe geometric departure from the 64T^64 manifold. Consequently, maintaining a stable computation strictly on the N-Torus via intermediate geometric projections (z↦z/|z|z z/|z|) restricts the deep cascade of parameters, whereas preserving the unhindered complex interference ℂNC^N yields greater latent dimensional expressivity. A.3 Global Diffusion in the DFT Gate This phenomenon scales dramatically under the Discrete Fourier Transform (DFT). The DFT matrix FNF_N acts on N threads (k=0,…,N−1k=0,…,N-1): zj′=1N∑k=0N−1ei(ϕk−2πNjk).z_j = 1 N _k=0^N-1e^i ( _k- 2πNjk ). (61) Under maximum constructive interference, where input phases perfectly align with the DFT basis (ϕk=2πNjk _k= 2πNjk), the resulting thread reaches a magnitude of: |zj′|=1N×N=N.|z_j |= 1 N× N= N. (62) For a circuit with N=64N=64 threads, a single maximally constructive thread reaches a magnitude of 88. While mathematically precise within ℂNC^N, enforcing strict containment strictly upon the N-Torus requires interleaving these linear mixing stages with non-linear projections, z↦z/|z|z z/|z| (Threshold gate), to restore the fundamental constraint of unit amplitude. A.4 Autograd Differentiation on ℂNC^N vs. NT^N By relaxing the strict geometric pullback, PyTorch’s Autograd engine achieves uninterrupted backpropagation. Let L(z)L(z) be the scalar objective loss function evaluated at the terminus of a deep Phasor Circuit. If the non-linear threshold T(z)=z/|z|T(z)=z/|z| is aggressively applied at every layer l, the gradient with respect to an intermediate phase parameter θ(l)θ^(l) explicitly requires computing the Jacobian of the normalization projector: ∂T(z)∂z=1|z|(I−zz†|z|2). ∂ T(z)∂ z= 1|z| (I- z |z|^2 ). (63) When interference is maximally destructive (|z|→0|z|→ 0), this Jacobian becomes highly singular, causing vanishing or exploding gradients. By allowing the network to flow naturally into ℂNC^N (omitting T(z)T(z)), the backpropagation path relies entirely on native unitary gradients, which are perfectly isometric and inherently preserve gradient norms layer-to-layer. A.5 Parameter Complexity: Euclidean Attention vs Phasor Mixing In the standard Euclidean Transformer [21], the self-attention mechanism requires projecting a sequence of length L and embedding dimension D into Queries (WQW_Q), Keys (WKW_K), and Values (WVW_V), followed by an output projection (WOW_O). The total trainable parameter count per attention head layer is: PAttention=4×D2.P_Attention=4× D^2. (64) For a typical small model with D=512D=512, this requires PAttention=1,048,576P_Attention=1,048,576 parameters. Conversely, the Phasor Transformer (resembling FNet [11]) replaces this entire block with the sequential 2D Discrete Fourier Transform (acting over both the Sequence length and Hidden dimensions): Zmix=Fseq⋅Zencode⋅Fhidden.Z_mix=F_seq· Z_encode· F_hidden. (65) Because the Fourier matrices FLF_L and FDF_D are constant fixed orthogonal basis transformations, the total parameter requirement per mixing layer drops uniformly to zero: PPhasorMix=0.P_PhasorMix=0. (66) This mathematically enforces (0)O(0) mixing parameters, transferring the representational burden entirely to the preceding parameterized single-qubit phase shift embeddings.